Digital applications often require decoupling capacitor(s) for the purpose of reducing power noise. The decoupling capacitors may be connected between VDD power rails and VSS power rails, so that high-frequency inductance noise will be eliminated due to the shorting effect of the decoupling capacitors for high-frequency signals.
Currently, there are various types of decoupling capacitors. For example, the decoupling capacitors may be made of transistors. FIG. 1 illustrates conventional decoupling capacitors formed by shorting the source and drain regions of transistors. The gates of the transistors are coupled to VDD or VSS power rails. Accordingly, if a power surge, for example, an electro-static discharge (ESD), occurs to one of the VDD or VSS power rails, the transistors may be damaged.
FIG. 2 illustrates another type of decoupling capacitor made of transistors, which, instead of having their gates connected to VDD and VSS power rails, have their sources/drains connected to the VDD and VSS power rails. Accordingly, the decoupling capacitor suffers less from the power surges. However, the transistors as shown in FIG. 2 were typically implemented using thick gate oxide with long device channels. When they are formed in core device regions, both the oxide thickness uniformity and critical dimension uniformity (which affects the gate width) are adversely affected. The situation is further worsened when the technology for forming the integrated circuit is down-scaled to 32 nm, which requires a very restricted rule as to the layouts of the integrated circuits. In addition, the decoupling capacitor as shown in FIG. 2 suffers from sub-threshold leakage.
The decoupling capacitors may also be formed of two conductive electrodes, as shown in FIGS. 3 through 6, which may be divided into poly-diffusion capacitors, poly-poly capacitors, metal-poly capacitors, and metal-metal capacitors. FIG. 3 illustrates a poly-diffusion capacitor, with a polysilicon (poly) plate and a diffusion region acting as the plates of the respective capacitor. This type of capacitor suffers from non-linearity caused by the change in the size of the depletion region in the diffusion region, which size changes with the applied voltage. FIGS. 4 and 5 illustrate a poly-poly capacitor and a metal-poly capacitor, respectively. These types of capacitors typically require extra process steps, and thus are more costly than other types of capacitors. FIG. 6 illustrates a metal-oxide-metal (MOM) capacitor, which may be formed in more than one metal layer. In each of the metal layers, metal fingers are placed in an alternating pattern to form a capacitor. The fingers in neighboring metal layers are arranged perpendicular to each other. The capacitance of such type of capacitor highly depends on the coupling capacitance between metal layers. Apparently, the MOM capacitor requires large chip area in a plurality of metal layers.
Accordingly, what are needed in the art are capacitors suffering less from leakage currents and occupying less chip area. The capacitance per unit area also needs to be high so that the capacitors can be formed in advanced technologies, such as 32 nm technology and below.